Step 1 of 3 · 1986 to 1999

Give engineers a generated circuit to improve

Aart de Geus describes the founding team bringing synthesis technology out of GE and commercializing software that generated and optimized circuit logic. The interview distinguishes this work from earlier computer-aided drawing: the software produced part of the design itself. SY1

Synthesis moved repeatable design work into an algorithm, allowing engineers to work at a higher level of description. Its value depended on usable output, so verification and trust remained part of adoption. The choice explains a concrete entry point into a difficult engineering workflow, rather than attributing the business simply to semiconductor growth.

The origin story is a founder recollection recorded decades later. It does not provide independent early productivity measurements.

Rivals Manual gate-level work is the original alternative. Later competing synthesis products mean that the original automation is not, by itself, evidence of a lasting exclusive capability.

Founder Domain Expertise

Step 2 of 3 · 2000 to 2024

Stay current with the process customers must manufacture on

Synopsys’ executives describe substantial engineering collaboration with foundries during process development. They also explain how EDA and reusable IP address different parts of chip development. The filing describes software agreements in which continuing updates are integral to the usefulness of the licensed tools. SY1 SY3

A design tool loses value if it cannot support the process a customer will use. Repeated foundry and customer work helps translate changing physical requirements into usable software. Reusable IP can spare a design team from rebuilding a standard function. Once a team has qualified tools, scripts and IP, replacement involves engineering work; the advantage is specific to that workflow and must be renewed at later nodes.

Shared industry expertise is not automatically a firm-specific barrier. Direct customer replacement budgets and comparative qualification results remain unavailable.

Rivals Cadence and Siemens also invest in foundry relationships and verification. The test is whether Synopsys produces a better qualified flow, and how much customer work a substitution requires.

Step 3 of 3 · 2025

Expand into simulation while the IP business exposes limits

Synopsys completed its Ansys acquisition on July 17, 2025. Fiscal 2025 revenue reached roughly $7.1 billion, including $756.6 million from Ansys. The same filing reported weaker Design IP performance, a 22% revenue decline in China excluding Ansys, and roadmap and resource choices that had missed expectations. SY3

The acquisition bought a broader simulation capability and customer base. It did not demonstrate that chip design and engineering simulation were already an integrated growth engine. The IP shortfall also shows that an established technical position cannot remove demand, policy or execution risk. Recurring contracts smooth the timing of reported revenue, so current revenue is an imperfect measure of current selling conditions.

The study ends in 2025 and therefore cannot establish the long-run return on the Ansys transaction. The observed growth mixes acquisition scope, organic activity and period-length effects.

Rivals Compare purchased Ansys revenue with organic design-tool and IP performance. Cadence’s system-analysis expansion offers a relevant strategic alternative, but integration results require a later observation.

M&A Strategy